MPEVT: Manipulate hardware performance counter events
Syntax:
mpevt -s [Name] (START)
-r [NameList] (READ)
-e [NameList] (END)
-eall (END ALL)
-l<d<d>> (LIST SUPPORTED)
-la<d<d> (LIST ACTIVE)
-lc (LIST EVENT/CTRS)
-q [NameList] <TimeOpt> <-dec> (QUERY TO STDOUT)
-qf [NameList] <-f fn> <TimeOpt> <-dec> (QUERY TO FILE)
Name: [-n name | -i id]
NameList: [-n name<,name<,...>> | -i id<,id<,...>>]
TimeOpt: <-t sec> <-ts sec> <-tr sec>
Where:
***** Command verbs *****
-s
Starts the requested performance counter event on all processors.
* Events must be started one at a time - you can't specify a name list.
* Once you're done using the event you should 'end' it (-e).
* Different events are valid for different processor families.
* To see a list of valid events enter: "mpevt -l"
-r
Read counters associated with event once. Output to STDOUT.
-e
Ends (terminates) event and releases resources associated with it.
-eall
Ends (terminates) ALL (terminates) all active events.
-l
Lists supported performance counter events for processor family.
Display includes event ids and event names.
-ld
Lists supported performance counter events for processor family.
Display includes event ids, event names and event descriptions.
-ldd
Same as "-ld" but with additional detail, including the hardware
event name and unit/event mask (as listed in the Intel/AMD docs),
and the counters on which the event can be counted.
-la
Lists active (ie. started) performance counter events.
Display includes event ids and event names.
-lad
Lists active (ie. started) performance counter events.
Display includes event ids, event names and event descriptions.
-ladd
Same as "-lad" but with additional detail, including the counter
on which the event is being counted, and the counter control MSRs.
-lc
Lists active performance counter events, and their associated
performance counters, by processor.
-q
Continually read counter associated with event.
* Output to STDOUT.
* Read time interval is 1 second unless -t is specified.
-qf
Continually read counter associated with event.
* Output to 'evt.out' file, unless -f specified.
* Read time interval is 1 second unless -t is specified.
***** Command modifiers *****
-n name | name_list
Specifies events by name.
* 'name' is a single event name.
- Required with -s.
- Allowed with -r, -e, -q and -qf.
* 'name_list' is a comma-separated list of event names.
- Allowed with -r, -e, -q and -qf.
- Not allowed with -s.
* The pseudo-name "active" is a synonym for all active events.
- It can be used with any command that allows a 'name_list'.
* To see a list of valid event names enter: "mpevt -l"
* Event names *DO NOT* have to be specified in uppercase.
- INSTR, iNsTr, Instr, instr, InStR, etc., all specify the same event.
-i id | id_list
Specifies events by ID.
* 'id' is a single event id.
- Required with -s.
- Allowed with -r, -e, -q and -qf.
* 'id_list' is a comma-separated list of event ids.
- Allowed with -r, -e, -q and -qf.
- Not allowed with -s.
* The pseudo-id "active" is a synonym for all active events.
- It can be used with any command that allows a 'id_list'.
* To see a list of valid event ids enter: "mpevt -l"
-f fn
Specifies filename where read values will be written to.
-t sec
Specifies interval time, in seconds, between event reads.
-ts sec
Specifies time delay, in seconds, to start reading events.
* Default is immediately (same as -t 0).
-tr sec
Specifies length of time, in seconds, to run for.
* Default is forever or until stopped via Ctrl-C.
-dec
Display event value in decimal.
* Default is to display event value in hexadecimal.
* Delta value is always displayed in decimal.
Examples:
1) mpevt -s -n instr
mpevt -s -n INSTR
mpevt -s -n InStR
mpevt -s -i 102
* Sets up the correct performance counter to count instructions retired.
* It does not require you to know how to set up the counters.
2) mpevt -r -n instr
mpevt -r -i 102
- Reads current counter values(s) for the INSTR event (if it was started).
3) mpevt -r -n instr,calls
mpevt -r -i 102,108
* Reads current counter values(s) for the INSTR and CALLS events (if they
were started and active).
4) mpevt -r -n instr,calls -t 10
mpevt -r -i 102,108 -t 10
* Reads counter values(s) for the INSTR and CALLS events (if they were
started and active) every 10 seconds, until stopped via Ctrl-C.
5) mpevt -r -n active -t 5 -f results.out
mpevt -r -i active -t 5 -f results.out
* Reads counter values(s) for all active events every 5 seconds, until
stopped via Ctrl-C. Writes results to file 'results.out'.
6) mpevt -ld
* Lists supported events, if any, and displays event descriptions.
7) mpevt -lad
* Lists currently active events, if any, and displays event descriptions.
8) mpevt -e -n INSTR
mpevt -e -i 102
* Stops and ends counting the INSTR event (if it was started).
9) mpevt -eall
* Stops and ends all currently active events.
Notes:
1) The list of supported events will be different on different processors.
- P6, P4 and Core 2 processors support different events.
2) If you specify events that are not active they will be ignored.
3) If you specify options that are not applicable to the command they
will be ignored. For example, if you specify the -f and/or -t option with
-s, both will be ignored.
4) If you specify conflicting options then the right-most option is used.
For example, if you specify the -n and -i option with -s, then the value
given with -i will be used.
Manipulate P6/P4/AMD64/EM64T hardware performance counters.
mpcnt -s ctr cccr escr <msr value <msr value>> (START P4/EM64T)
-s ctr evtsel (START P6/AMD64)
-p ctr <ctr ...> (PAUSE (STOP))
-u ctr <ctr ...> (RESUME)
-z ctr <ctr ...> (ZERO (RESET))
-r ctr <ctr ...> (READ)
-q ctr <ctr ...> (READ INTERACTIVE)
-qf ctr <ctr ...> <-f fn> <-t sec> (READ TO FILE)
-qso ctr <ctr ...> <-t sec> (READ TO STDOUT)
<-c target_cpu> (Target CPU)
Where:
------
***** Command verbs *****
-s
-start
Stars the requested performance counter on requested processors
- ctr specifies a counter number or name
- P6/AMD64:
* evtsel specifies the 32-bit value of the Event Select
register associated with the counter. The actual Event
Select registger number is implied from the counter number.
- P4/EM64T:
* cccr specifies the 32-bit value of the CCCR register
associated with the counter.
* escr specifies the 32-bit value of the ESCR register
associated with the counter/CCCR value.
* msr/value is an MSR number/value pair required to set up the
counter. Neither one is checked for validity.
-p
-pause
Pauses (stops) the requested counters. The counters stop counting.
The counter contents is left unchanged.
-u
-resume
Resumes (unpauses?) the requested counters. The counters resume
counting from where they left off.
-z
-reset
Resets (clears) the requested counters. The counter is set
to zero. If counting is not stopped the counter continues counting.
-r
-read
Read and display contents of requested counters.
-q
-query
Read and display contents of requestes counter and go into input mode.
- From input mode you can Query (again) or End the current event.
- Output to STDOUT.
-qf
-queryf
Read contents of requested counters continually.
- Output to 'ctr.out' file, unless -f option specified.
- Read time interval is 1 second unless -t is specified.
-qso
-queryso
Read contents of requested counters continually.
- Output to STDOUT.
- Read time interval is 1 second unless -t is specified.
***** Command modifiers *****
-c target_cpu
-cpu target_cpu
Specifies the processor(s) to which the requested command is sent.
Valid values for target_cpu are:
- The word 'all'. This is the default.
- A cpu number
- A cpu name in the form CPU#
- The word 'LP0'. This means the Logical 0 (even) CPUs in a
HyperThreaded physical CPU.
- The word 'LP1'. This means the Logical 1 (odd) CPUs in a
HyperThreaded physical CPU.
-f fn
-file fn
Specifies filename where read values will be written to.
-t sec
-time sec
Specifies time interval time, in seconds, between event reads.
Notes:
------
1) It is *YOUR RESPONSIBILITY* to know and understand what you are doing.
If you're not sure, don't do it and take a look at the processor documentation.
2) mpcnt **DOES NOT** work on P5 (Pentium) machines.
3) On P6 systems you must remember that both counters are started/stopped
using PerfEvtSel0. That means if you want the counters to count you
must start some event on counter 0.
4) Given number 3 above, you can't stop a single counter on a P6 system.
When you say "stop/pause a counter" you are really saying "stop/pause
*BOTH* counters."
5) mpcnt accepts the correct form of the start command based on the
machine you are running.
6) If you specify options that are not applicable to the command they
will be ignored. For example, if you specify the -f and/or -t option with
-s, both will be ignored.
7) If you specify conflicting/duplicate options then the right-most option
is used. For example, if you specify the -f option twice, then the value
given with the rightmost -f will be used.
Examples:
---------
1) mpcnt -s ctr0 0x00430079
- On a P6 processor, set ctr0 to count CPU_CYCLES_UNHALTED.
2) mpcnt -s ctr1 0x004300c0
- On a P6 processor, set ctr1 to count INSTR_RETIRED.
3) mpcnt -s ctr1 0x01234567
- On a P6 processor, set ctr0 to count whatever 0x01234567 means.
4) mpcnt -s ctr12 0x00039000 0x0400060c
- On a P4/EM64T processor, set ctr12 to count non-bogus Instr_retired.
5) mpcnt -s 3 0x00037000 0x3000040c
- On a P4/EM64T processor, set ctr3 to count ITLB_misses.
6) mpcnt -s 1 0x004300c0
- On an AMD64 processor, set ctr1 to count RETIRED_X86_INSTR.
7) mpcnt -s 3 0x004300c1
- On an AMD64 processor, set ctr1 to count RETIRED_UOPS.